Microsystems Prototyping Laboratory

xnof201: 2 INPUT XNOR

• Gate Level Schematic
• Transistor Level Schematic
• Layout
• Logic Equation
• Inputs
• Outputs
• Truth Table
• Terminal Location and Capacitance
• Characterization Data

here.

-----------------
A	B	O
-----------------
0	0	1
0	1	0
1	0	0
1	1	1
-----------------

--------------------------------------------
Name	X_loc	Y_loc	   Capacitance (fF)
	lambda  lambda   2U	1.2U	0.8U
--------------------------------------------
A1	13	25	88.5	41.7	26.2
B1	61.5	38	95.9	44.6	27.9
O	97	27	-	-	-
--------------------------------------------

• Delay Information