As it could be seen in the last section, it's possible to read more from files than just data. Many commercially available testbenches support sophisticated commands. There are limits however: in most cases structural elements like loops and procedures are missing. It's theoretically possible to extend the file reader into a proper parser and add these language elements, however VHDL is not really suited for these tasks and access to the source code may not always be possible. A way to get around these problems is to generate the input files with a different language such as perl.
The perl script below will generate an input file which can be read by file_read.vhd.
print "00011\n";
print "11100\n";
for ($i=0;$i<10;$i++) {
print num2binary($i,5)."\n";
}
print "1UXZW\n";
print "11111\n";
Resulting Stimulus File:
00011
11100
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
1UXZW
HL111
11111
It's straightforward to extend this approach e.g. for 256 iterations if all values of a 8 bit word are to be covered. Entering these values manually would be very cumbersome. The script actually calls a procedure num2binary which can be found in the complete script. More complex procedures like PRBS patterns or CRC generators could be used in a similar fashion.
Here is the complete perl script:
 |
| tgen.pl |
